Summary
This paper evaluates the influence of the interface traps distribution on the I-V (I_D-V_GS) and C-V(C_G-V_G) characteristics of SiC MOSFET by TCAD simulations. Firstly, a TCAD model of commercial SiC MOSFET is established. Then, the effect of the interface traps distribution on the I_D-V_GS and C_G-V_G characteristics of SiC MOSFET is studied in detail under different trap types and energy levels. Moreover, the correlation between I_D-V_GS and C_G-V_G curves is analyzed. The acceptor traps close to E_V or the donor traps close to E_C cause the overall C_G-V_G curve to shift. Moreover, the influence of the interface traps on V_TH reflected in the C_G-V_G curve is consistent with that in I_D-V_GS. The analysis in this paper is a support in the comprehension of interface traps distribution and the calibration of the TCAD model of SiC MOSFET.

Motivation
Limited by the material properties and the processing technology, the interface state density of SiC/SiO₂ is nearly two to three orders of magnitude higher than that of the Si/SiO₂, which causes a series of reliability issues of SiC MOSFET[1]. TCAD simulator is a consolidated tool for modeling power semiconductor devices. However, the complicated interface traps distribution that is difficult to obtain accurately leads to the inaccuracy of TCAD simulation. Therefore, it is very important to evaluate the interface traps by TCAD, which helps to establish an accurate TCAD model. Some researchers have analyzed the influence of interface traps distribution on the C-V characteristics by TCAD[2]. In literature 3, the effect of interface traps on V_TH hysteresis is studied[3]. However, the comprehensive analysis and the correlation between the influence of the interface traps on the I-V and C-V characteristics of SiC MOSFET remains to be explored.

Results
In this paper, the TCAD model of a vertical 1200V SiC MOSFET is established first, as shown in Fig. 1. The model is calibrated under the condition that only the acceptor traps close to E_C are considered2. The I_D-V_GS and C_G-V_G of the model are almost consistent with the product after calibrating. Secondly, the effect of type and energy level of the interface traps on the I_D-V_GS, V_TH, and μ_ni is studied in detail and the results are shown in Fig. 2-4. The V_TH increases whether the acceptor traps are close to E_C or E_V. However, it decreases with the donor traps located near the E_C and hardly affected by the donor traps located near the E_V. Moreover, it can be seen from the slope of the I_D-V_GS curves that the μ_ni almost no change when the acceptor traps of the same density change from E_C to E_V. But the μ_ni increases for the donor traps with the same change. Then, Fig. 5-6 show the C_G-V_G curves extracted under the above conditions. The relationship between the influence of interface traps on C-V and I-V is revealed. In conclusion, the overall C_G-V_G curve shifts when there are acceptor traps near the E_V or donor traps near the E_C. This reflects the change in V_TH and flat band voltage V_FB, which is consistent with the results of I_D-V_GS. A more accurate interface traps distribution and TCAD model of SiC MOSFET can be obtained under the combination of the analysis in this paper and the measurement of the I-V and C-V characteristics.

Interface Traps,SiC MOSFET,I-V and C-V Characteristics,TCAD Simulations